1. Field of the Invention
Some preferred embodiments of the present invention relate to an input/output circuit (I/O circuit), and, more specifically to a communication I/O interface capable of reducing power consumption.
2. Description of the Related Art
The following description sets forth the inventor's knowledge of related art and problems therein and should not be construed as an admission of knowledge in the prior art.
In recent years, considering environments, electronic products are required to be operated at a low power consumption rate. In a capacity-coupled type communication device commonly used in a signal I/O circuit arranged between ICs mounted in an electronic product, the power consumption can be roughly classified into a power consumption of the interface portion and a power consumption of the data processing portion. Between these portions, the interface portion performing analog operations consumes most of the power, whereas the power consumption of the data processing portion constituted by digital circuits is relatively small. For this reason, in order to reduce the entire power consumption, it is effective to reduce the power consumption of the interface portion. Japanese Unexamined Laid-open Patent Application Publication No. 2005-20268 describes a signal I/O circuit using a comparator.
FIG. 4 shows a schematic structure of a conventional signal I/O circuit. In this case, a signal from a transmitter 1 is received by a coupling capacitance 2. When the coupling capacitance 2 is charged in an H-level, it means that an H-level signal was transmitted from the transmitter 1. On the other hand, when the coupling capacitance 2 is charged in an L-level, it means that an L-level signal was transmitted from the transmitter 1. This type is generally referred to as a “capacity-coupled type.” At this time, the communication line L connected to the coupling capacitance 2 in series is biased at a certain voltage. The biased voltage is compared with a reference voltage Vref by a comparator 4 mounted in a receiving portion 3, whereby it is judged whether the signal transmitted form the transmitter 1 is an H-level signal or an L-level signal. The comparison result will be outputted to a data processing portion 5 as an output signal.
In this case, the comparator 4 functions as a detector. Thus, the comparator 4 is always biased at a midpoint potential and constantly consumes a power to follow the changes of the input signal to judge the signal level.
However, in a conventional I/O circuit, as mentioned above, an electric current constantly flows through the comparator to follow the changes of the input signal to judge the signal level. This constant electric flow flowing through the comparator causes a large amount of power consumption.
Under the circumstances, considering environments, in recent yeas, an I/O circuit of this kind is required to reduce power consumption as low as possible.
The description herein of advantages and disadvantages of various features, embodiments, methods, and apparatus disclosed in other publications is in no way intended to limit the present invention. For example, certain features of the preferred embodiments of the invention may be capable of overcoming certain disadvantages and/or providing certain advantages, such as, e.g., disadvantages and/or advantages discussed herein, while retaining some or all of the features, embodiments, methods, and apparatus disclosed therein.